Instruments and Systems: Monitoring, Control, and Diagnostics Annotation << Back Methodical approach to improve the reliability of the operation of information processing devices with minimal information and hardware redundancy A.A. PAVLOV, V.Z. VOLKOV, A.N. TSAR’KOV, D.A. KORSUNSKIY The necessity of increase of reliability of functioning of the arithmetic and logical unit (ALU) of the processor of the computer. Defined requirements for methods of error detection in ALU processors, which include: the detection capacity of the method of control, time and hardware cost. The analysis of existing methods of control information and the identified contradiction connected with necessity of increase of reliability of functioning of the ALU processors and increasing hardware and time costs required for that purpose. The expediency of adaptation of a linear code to detect errors in ALU of the processor devices, information processing (ECM). Carried out algebraic linear control ALU processors. The patterns that allow to formulate rules for the adaptation of linear code for detecting single and double errors of the ALU processor when performing arithmetic and logical operations are revealed. A methodical approach is proposed for detecting single and double errors of ALU CPUs of the OOI when performing arithmetic and logical operations with minimal hardware and time costs. Keywords: algebraic linear code, information bits, check digits, error syndrome, single and double errors, information redundancy, hardware redundancy. Contacts: E-mail: Pavlov_iif@mail.ru Pp. 30-37.